| File: | hw/xen/xen_pt.c |
| Location: | line 562, column 13 |
| Description: | Value stored to 'rc' is never read |
| 1 | /* |
| 2 | * Copyright (c) 2007, Neocleus Corporation. |
| 3 | * Copyright (c) 2007, Intel Corporation. |
| 4 | * |
| 5 | * This work is licensed under the terms of the GNU GPL, version 2. See |
| 6 | * the COPYING file in the top-level directory. |
| 7 | * |
| 8 | * Alex Novik <alex@neocleus.com> |
| 9 | * Allen Kay <allen.m.kay@intel.com> |
| 10 | * Guy Zana <guy@neocleus.com> |
| 11 | * |
| 12 | * This file implements direct PCI assignment to a HVM guest |
| 13 | */ |
| 14 | |
| 15 | /* |
| 16 | * Interrupt Disable policy: |
| 17 | * |
| 18 | * INTx interrupt: |
| 19 | * Initialize(register_real_device) |
| 20 | * Map INTx(xc_physdev_map_pirq): |
| 21 | * <fail> |
| 22 | * - Set real Interrupt Disable bit to '1'. |
| 23 | * - Set machine_irq and assigned_device->machine_irq to '0'. |
| 24 | * * Don't bind INTx. |
| 25 | * |
| 26 | * Bind INTx(xc_domain_bind_pt_pci_irq): |
| 27 | * <fail> |
| 28 | * - Set real Interrupt Disable bit to '1'. |
| 29 | * - Unmap INTx. |
| 30 | * - Decrement xen_pt_mapped_machine_irq[machine_irq] |
| 31 | * - Set assigned_device->machine_irq to '0'. |
| 32 | * |
| 33 | * Write to Interrupt Disable bit by guest software(xen_pt_cmd_reg_write) |
| 34 | * Write '0' |
| 35 | * - Set real bit to '0' if assigned_device->machine_irq isn't '0'. |
| 36 | * |
| 37 | * Write '1' |
| 38 | * - Set real bit to '1'. |
| 39 | * |
| 40 | * MSI interrupt: |
| 41 | * Initialize MSI register(xen_pt_msi_setup, xen_pt_msi_update) |
| 42 | * Bind MSI(xc_domain_update_msi_irq) |
| 43 | * <fail> |
| 44 | * - Unmap MSI. |
| 45 | * - Set dev->msi->pirq to '-1'. |
| 46 | * |
| 47 | * MSI-X interrupt: |
| 48 | * Initialize MSI-X register(xen_pt_msix_update_one) |
| 49 | * Bind MSI-X(xc_domain_update_msi_irq) |
| 50 | * <fail> |
| 51 | * - Unmap MSI-X. |
| 52 | * - Set entry->pirq to '-1'. |
| 53 | */ |
| 54 | |
| 55 | #include <sys/ioctl.h> |
| 56 | |
| 57 | #include "hw/pci/pci.h" |
| 58 | #include "hw/xen/xen.h" |
| 59 | #include "hw/xen/xen_backend.h" |
| 60 | #include "xen_pt.h" |
| 61 | #include "qemu/range.h" |
| 62 | #include "exec/address-spaces.h" |
| 63 | |
| 64 | #define XEN_PT_NR_IRQS(256) (256) |
| 65 | static uint8_t xen_pt_mapped_machine_irq[XEN_PT_NR_IRQS(256)] = {0}; |
| 66 | |
| 67 | void xen_pt_log(const PCIDevice *d, const char *f, ...) |
| 68 | { |
| 69 | va_list ap; |
| 70 | |
| 71 | va_start(ap, f)__builtin_va_start(ap, f); |
| 72 | if (d) { |
| 73 | fprintf(stderrstderr, "[%02x:%02x.%d] ", pci_bus_num(d->bus), |
| 74 | PCI_SLOT(d->devfn)(((d->devfn) >> 3) & 0x1f), PCI_FUNC(d->devfn)((d->devfn) & 0x07)); |
| 75 | } |
| 76 | vfprintf(stderrstderr, f, ap); |
| 77 | va_end(ap)__builtin_va_end(ap); |
| 78 | } |
| 79 | |
| 80 | /* Config Space */ |
| 81 | |
| 82 | static int xen_pt_pci_config_access_check(PCIDevice *d, uint32_t addr, int len) |
| 83 | { |
| 84 | /* check offset range */ |
| 85 | if (addr >= 0xFF) { |
| 86 | XEN_PT_ERR(d, "Failed to access register with offset exceeding 0xFF. "xen_pt_log(d, "%s: Error: ""Failed to access register with offset exceeding 0xFF. " "(addr: 0x%02x, len: %d)\n", __func__, addr, len) |
| 87 | "(addr: 0x%02x, len: %d)\n", addr, len)xen_pt_log(d, "%s: Error: ""Failed to access register with offset exceeding 0xFF. " "(addr: 0x%02x, len: %d)\n", __func__, addr, len); |
| 88 | return -1; |
| 89 | } |
| 90 | |
| 91 | /* check read size */ |
| 92 | if ((len != 1) && (len != 2) && (len != 4)) { |
| 93 | XEN_PT_ERR(d, "Failed to access register with invalid access length. "xen_pt_log(d, "%s: Error: ""Failed to access register with invalid access length. " "(addr: 0x%02x, len: %d)\n", __func__, addr, len) |
| 94 | "(addr: 0x%02x, len: %d)\n", addr, len)xen_pt_log(d, "%s: Error: ""Failed to access register with invalid access length. " "(addr: 0x%02x, len: %d)\n", __func__, addr, len); |
| 95 | return -1; |
| 96 | } |
| 97 | |
| 98 | /* check offset alignment */ |
| 99 | if (addr & (len - 1)) { |
| 100 | XEN_PT_ERR(d, "Failed to access register with invalid access size "xen_pt_log(d, "%s: Error: ""Failed to access register with invalid access size " "alignment. (addr: 0x%02x, len: %d)\n", __func__, addr, len) |
| 101 | "alignment. (addr: 0x%02x, len: %d)\n", addr, len)xen_pt_log(d, "%s: Error: ""Failed to access register with invalid access size " "alignment. (addr: 0x%02x, len: %d)\n", __func__, addr, len); |
| 102 | return -1; |
| 103 | } |
| 104 | |
| 105 | return 0; |
| 106 | } |
| 107 | |
| 108 | int xen_pt_bar_offset_to_index(uint32_t offset) |
| 109 | { |
| 110 | int index = 0; |
| 111 | |
| 112 | /* check Exp ROM BAR */ |
| 113 | if (offset == PCI_ROM_ADDRESS0x30) { |
| 114 | return PCI_ROM_SLOT6; |
| 115 | } |
| 116 | |
| 117 | /* calculate BAR index */ |
| 118 | index = (offset - PCI_BASE_ADDRESS_00x10) >> 2; |
| 119 | if (index >= PCI_NUM_REGIONS7) { |
| 120 | return -1; |
| 121 | } |
| 122 | |
| 123 | return index; |
| 124 | } |
| 125 | |
| 126 | static uint32_t xen_pt_pci_read_config(PCIDevice *d, uint32_t addr, int len) |
| 127 | { |
| 128 | XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d)( __extension__ ( { char __attribute__((unused)) offset_must_be_zero [ -__builtin_offsetof(XenPCIPassthroughState, dev)]; ({ const typeof(((XenPCIPassthroughState *) 0)->dev) *__mptr = (d) ; (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof (XenPCIPassthroughState, dev));});})); |
| 129 | uint32_t val = 0; |
| 130 | XenPTRegGroup *reg_grp_entry = NULL((void*)0); |
| 131 | XenPTReg *reg_entry = NULL((void*)0); |
| 132 | int rc = 0; |
| 133 | int emul_len = 0; |
| 134 | uint32_t find_addr = addr; |
| 135 | |
| 136 | if (xen_pt_pci_config_access_check(d, addr, len)) { |
| 137 | goto exit; |
| 138 | } |
| 139 | |
| 140 | /* find register group entry */ |
| 141 | reg_grp_entry = xen_pt_find_reg_grp(s, addr); |
| 142 | if (reg_grp_entry) { |
| 143 | /* check 0-Hardwired register group */ |
| 144 | if (reg_grp_entry->reg_grp->grp_type == XEN_PT_GRP_TYPE_HARDWIRED) { |
| 145 | /* no need to emulate, just return 0 */ |
| 146 | val = 0; |
| 147 | goto exit; |
| 148 | } |
| 149 | } |
| 150 | |
| 151 | /* read I/O device register value */ |
| 152 | rc = xen_host_pci_get_block(&s->real_device, addr, (uint8_t *)&val, len); |
| 153 | if (rc < 0) { |
| 154 | XEN_PT_ERR(d, "pci_read_block failed. return value: %d.\n", rc)xen_pt_log(d, "%s: Error: ""pci_read_block failed. return value: %d.\n" , __func__, rc); |
| 155 | memset(&val, 0xff, len); |
| 156 | } |
| 157 | |
| 158 | /* just return the I/O device register value for |
| 159 | * passthrough type register group */ |
| 160 | if (reg_grp_entry == NULL((void*)0)) { |
| 161 | goto exit; |
| 162 | } |
| 163 | |
| 164 | /* adjust the read value to appropriate CFC-CFF window */ |
| 165 | val <<= (addr & 3) << 3; |
| 166 | emul_len = len; |
| 167 | |
| 168 | /* loop around the guest requested size */ |
| 169 | while (emul_len > 0) { |
| 170 | /* find register entry to be emulated */ |
| 171 | reg_entry = xen_pt_find_reg(reg_grp_entry, find_addr); |
| 172 | if (reg_entry) { |
| 173 | XenPTRegInfo *reg = reg_entry->reg; |
| 174 | uint32_t real_offset = reg_grp_entry->base_offset + reg->offset; |
| 175 | uint32_t valid_mask = 0xFFFFFFFF >> ((4 - emul_len) << 3); |
| 176 | uint8_t *ptr_val = NULL((void*)0); |
| 177 | |
| 178 | valid_mask <<= (find_addr - real_offset) << 3; |
| 179 | ptr_val = (uint8_t *)&val + (real_offset & 3); |
| 180 | |
| 181 | /* do emulation based on register size */ |
| 182 | switch (reg->size) { |
| 183 | case 1: |
| 184 | if (reg->u.b.read) { |
| 185 | rc = reg->u.b.read(s, reg_entry, ptr_val, valid_mask); |
| 186 | } |
| 187 | break; |
| 188 | case 2: |
| 189 | if (reg->u.w.read) { |
| 190 | rc = reg->u.w.read(s, reg_entry, |
| 191 | (uint16_t *)ptr_val, valid_mask); |
| 192 | } |
| 193 | break; |
| 194 | case 4: |
| 195 | if (reg->u.dw.read) { |
| 196 | rc = reg->u.dw.read(s, reg_entry, |
| 197 | (uint32_t *)ptr_val, valid_mask); |
| 198 | } |
| 199 | break; |
| 200 | } |
| 201 | |
| 202 | if (rc < 0) { |
| 203 | xen_shutdown_fatal_error("Internal error: Invalid read " |
| 204 | "emulation. (%s, rc: %d)\n", |
| 205 | __func__, rc); |
| 206 | return 0; |
| 207 | } |
| 208 | |
| 209 | /* calculate next address to find */ |
| 210 | emul_len -= reg->size; |
| 211 | if (emul_len > 0) { |
| 212 | find_addr = real_offset + reg->size; |
| 213 | } |
| 214 | } else { |
| 215 | /* nothing to do with passthrough type register, |
| 216 | * continue to find next byte */ |
| 217 | emul_len--; |
| 218 | find_addr++; |
| 219 | } |
| 220 | } |
| 221 | |
| 222 | /* need to shift back before returning them to pci bus emulator */ |
| 223 | val >>= ((addr & 3) << 3); |
| 224 | |
| 225 | exit: |
| 226 | XEN_PT_LOG_CONFIG(d, addr, val, len); |
| 227 | return val; |
| 228 | } |
| 229 | |
| 230 | static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, |
| 231 | uint32_t val, int len) |
| 232 | { |
| 233 | XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d)( __extension__ ( { char __attribute__((unused)) offset_must_be_zero [ -__builtin_offsetof(XenPCIPassthroughState, dev)]; ({ const typeof(((XenPCIPassthroughState *) 0)->dev) *__mptr = (d) ; (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof (XenPCIPassthroughState, dev));});})); |
| 234 | int index = 0; |
| 235 | XenPTRegGroup *reg_grp_entry = NULL((void*)0); |
| 236 | int rc = 0; |
| 237 | uint32_t read_val = 0; |
| 238 | int emul_len = 0; |
| 239 | XenPTReg *reg_entry = NULL((void*)0); |
| 240 | uint32_t find_addr = addr; |
| 241 | XenPTRegInfo *reg = NULL((void*)0); |
| 242 | |
| 243 | if (xen_pt_pci_config_access_check(d, addr, len)) { |
| 244 | return; |
| 245 | } |
| 246 | |
| 247 | XEN_PT_LOG_CONFIG(d, addr, val, len); |
| 248 | |
| 249 | /* check unused BAR register */ |
| 250 | index = xen_pt_bar_offset_to_index(addr); |
| 251 | if ((index >= 0) && (val > 0 && val < XEN_PT_BAR_ALLF0xFFFFFFFF) && |
| 252 | (s->bases[index].bar_flag == XEN_PT_BAR_FLAG_UNUSED)) { |
| 253 | XEN_PT_WARN(d, "Guest attempt to set address to unused Base Address " |
| 254 | "Register. (addr: 0x%02x, len: %d)\n", addr, len); |
| 255 | } |
| 256 | |
| 257 | /* find register group entry */ |
| 258 | reg_grp_entry = xen_pt_find_reg_grp(s, addr); |
| 259 | if (reg_grp_entry) { |
| 260 | /* check 0-Hardwired register group */ |
| 261 | if (reg_grp_entry->reg_grp->grp_type == XEN_PT_GRP_TYPE_HARDWIRED) { |
| 262 | /* ignore silently */ |
| 263 | XEN_PT_WARN(d, "Access to 0-Hardwired register. " |
| 264 | "(addr: 0x%02x, len: %d)\n", addr, len); |
| 265 | return; |
| 266 | } |
| 267 | } |
| 268 | |
| 269 | rc = xen_host_pci_get_block(&s->real_device, addr, |
| 270 | (uint8_t *)&read_val, len); |
| 271 | if (rc < 0) { |
| 272 | XEN_PT_ERR(d, "pci_read_block failed. return value: %d.\n", rc)xen_pt_log(d, "%s: Error: ""pci_read_block failed. return value: %d.\n" , __func__, rc); |
| 273 | memset(&read_val, 0xff, len); |
| 274 | } |
| 275 | |
| 276 | /* pass directly to the real device for passthrough type register group */ |
| 277 | if (reg_grp_entry == NULL((void*)0)) { |
| 278 | goto out; |
| 279 | } |
| 280 | |
| 281 | memory_region_transaction_begin(); |
| 282 | pci_default_write_config(d, addr, val, len); |
| 283 | |
| 284 | /* adjust the read and write value to appropriate CFC-CFF window */ |
| 285 | read_val <<= (addr & 3) << 3; |
| 286 | val <<= (addr & 3) << 3; |
| 287 | emul_len = len; |
| 288 | |
| 289 | /* loop around the guest requested size */ |
| 290 | while (emul_len > 0) { |
| 291 | /* find register entry to be emulated */ |
| 292 | reg_entry = xen_pt_find_reg(reg_grp_entry, find_addr); |
| 293 | if (reg_entry) { |
| 294 | reg = reg_entry->reg; |
| 295 | uint32_t real_offset = reg_grp_entry->base_offset + reg->offset; |
| 296 | uint32_t valid_mask = 0xFFFFFFFF >> ((4 - emul_len) << 3); |
| 297 | uint8_t *ptr_val = NULL((void*)0); |
| 298 | |
| 299 | valid_mask <<= (find_addr - real_offset) << 3; |
| 300 | ptr_val = (uint8_t *)&val + (real_offset & 3); |
| 301 | |
| 302 | /* do emulation based on register size */ |
| 303 | switch (reg->size) { |
| 304 | case 1: |
| 305 | if (reg->u.b.write) { |
| 306 | rc = reg->u.b.write(s, reg_entry, ptr_val, |
| 307 | read_val >> ((real_offset & 3) << 3), |
| 308 | valid_mask); |
| 309 | } |
| 310 | break; |
| 311 | case 2: |
| 312 | if (reg->u.w.write) { |
| 313 | rc = reg->u.w.write(s, reg_entry, (uint16_t *)ptr_val, |
| 314 | (read_val >> ((real_offset & 3) << 3)), |
| 315 | valid_mask); |
| 316 | } |
| 317 | break; |
| 318 | case 4: |
| 319 | if (reg->u.dw.write) { |
| 320 | rc = reg->u.dw.write(s, reg_entry, (uint32_t *)ptr_val, |
| 321 | (read_val >> ((real_offset & 3) << 3)), |
| 322 | valid_mask); |
| 323 | } |
| 324 | break; |
| 325 | } |
| 326 | |
| 327 | if (rc < 0) { |
| 328 | xen_shutdown_fatal_error("Internal error: Invalid write" |
| 329 | " emulation. (%s, rc: %d)\n", |
| 330 | __func__, rc); |
| 331 | return; |
| 332 | } |
| 333 | |
| 334 | /* calculate next address to find */ |
| 335 | emul_len -= reg->size; |
| 336 | if (emul_len > 0) { |
| 337 | find_addr = real_offset + reg->size; |
| 338 | } |
| 339 | } else { |
| 340 | /* nothing to do with passthrough type register, |
| 341 | * continue to find next byte */ |
| 342 | emul_len--; |
| 343 | find_addr++; |
| 344 | } |
| 345 | } |
| 346 | |
| 347 | /* need to shift back before passing them to xen_host_pci_device */ |
| 348 | val >>= (addr & 3) << 3; |
| 349 | |
| 350 | memory_region_transaction_commit(); |
| 351 | |
| 352 | out: |
| 353 | if (!(reg && reg->no_wb)) { |
| 354 | /* unknown regs are passed through */ |
| 355 | rc = xen_host_pci_set_block(&s->real_device, addr, |
| 356 | (uint8_t *)&val, len); |
| 357 | |
| 358 | if (rc < 0) { |
| 359 | XEN_PT_ERR(d, "pci_write_block failed. return value: %d.\n", rc)xen_pt_log(d, "%s: Error: ""pci_write_block failed. return value: %d.\n" , __func__, rc); |
| 360 | } |
| 361 | } |
| 362 | } |
| 363 | |
| 364 | /* register regions */ |
| 365 | |
| 366 | static uint64_t xen_pt_bar_read(void *o, hwaddr addr, |
| 367 | unsigned size) |
| 368 | { |
| 369 | PCIDevice *d = o; |
| 370 | /* if this function is called, that probably means that there is a |
| 371 | * misconfiguration of the IOMMU. */ |
| 372 | XEN_PT_ERR(d, "Should not read BAR through QEMU. @0x"TARGET_FMT_plx"\n",xen_pt_log(d, "%s: Error: ""Should not read BAR through QEMU. @0x" "%016" "l" "x""\n", __func__, addr) |
| 373 | addr)xen_pt_log(d, "%s: Error: ""Should not read BAR through QEMU. @0x" "%016" "l" "x""\n", __func__, addr); |
| 374 | return 0; |
| 375 | } |
| 376 | static void xen_pt_bar_write(void *o, hwaddr addr, uint64_t val, |
| 377 | unsigned size) |
| 378 | { |
| 379 | PCIDevice *d = o; |
| 380 | /* Same comment as xen_pt_bar_read function */ |
| 381 | XEN_PT_ERR(d, "Should not write BAR through QEMU. @0x"TARGET_FMT_plx"\n",xen_pt_log(d, "%s: Error: ""Should not write BAR through QEMU. @0x" "%016" "l" "x""\n", __func__, addr) |
| 382 | addr)xen_pt_log(d, "%s: Error: ""Should not write BAR through QEMU. @0x" "%016" "l" "x""\n", __func__, addr); |
| 383 | } |
| 384 | |
| 385 | static const MemoryRegionOps ops = { |
| 386 | .endianness = DEVICE_NATIVE_ENDIAN, |
| 387 | .read = xen_pt_bar_read, |
| 388 | .write = xen_pt_bar_write, |
| 389 | }; |
| 390 | |
| 391 | static int xen_pt_register_regions(XenPCIPassthroughState *s) |
| 392 | { |
| 393 | int i = 0; |
| 394 | XenHostPCIDevice *d = &s->real_device; |
| 395 | |
| 396 | /* Register PIO/MMIO BARs */ |
| 397 | for (i = 0; i < PCI_ROM_SLOT6; i++) { |
| 398 | XenHostPCIIORegion *r = &d->io_regions[i]; |
| 399 | uint8_t type; |
| 400 | |
| 401 | if (r->base_addr == 0 || r->size == 0) { |
| 402 | continue; |
| 403 | } |
| 404 | |
| 405 | s->bases[i].access.u = r->base_addr; |
| 406 | |
| 407 | if (r->type & XEN_HOST_PCI_REGION_TYPE_IO) { |
| 408 | type = PCI_BASE_ADDRESS_SPACE_IO0x01; |
| 409 | } else { |
| 410 | type = PCI_BASE_ADDRESS_SPACE_MEMORY0x00; |
| 411 | if (r->type & XEN_HOST_PCI_REGION_TYPE_PREFETCH) { |
| 412 | type |= PCI_BASE_ADDRESS_MEM_PREFETCH0x08; |
| 413 | } |
| 414 | if (r->type & XEN_HOST_PCI_REGION_TYPE_MEM_64) { |
| 415 | type |= PCI_BASE_ADDRESS_MEM_TYPE_640x04; |
| 416 | } |
| 417 | } |
| 418 | |
| 419 | memory_region_init_io(&s->bar[i], OBJECT(s)((Object *)(s)), &ops, &s->dev, |
| 420 | "xen-pci-pt-bar", r->size); |
| 421 | pci_register_bar(&s->dev, i, type, &s->bar[i]); |
| 422 | |
| 423 | XEN_PT_LOG(&s->dev, "IO region %i registered (size=0x%lx"PRIx64 |
| 424 | " base_addr=0x%lx"PRIx64" type: %#x)\n", |
| 425 | i, r->size, r->base_addr, type); |
| 426 | } |
| 427 | |
| 428 | /* Register expansion ROM address */ |
| 429 | if (d->rom.base_addr && d->rom.size) { |
| 430 | uint32_t bar_data = 0; |
| 431 | |
| 432 | /* Re-set BAR reported by OS, otherwise ROM can't be read. */ |
| 433 | if (xen_host_pci_get_long(d, PCI_ROM_ADDRESS0x30, &bar_data)) { |
| 434 | return 0; |
| 435 | } |
| 436 | if ((bar_data & PCI_ROM_ADDRESS_MASK(~0x7ffUL)) == 0) { |
| 437 | bar_data |= d->rom.base_addr & PCI_ROM_ADDRESS_MASK(~0x7ffUL); |
| 438 | xen_host_pci_set_long(d, PCI_ROM_ADDRESS0x30, bar_data); |
| 439 | } |
| 440 | |
| 441 | s->bases[PCI_ROM_SLOT6].access.maddr = d->rom.base_addr; |
| 442 | |
| 443 | memory_region_init_rom_device(&s->rom, OBJECT(s)((Object *)(s)), NULL((void*)0), NULL((void*)0), |
| 444 | "xen-pci-pt-rom", d->rom.size); |
| 445 | pci_register_bar(&s->dev, PCI_ROM_SLOT6, PCI_BASE_ADDRESS_MEM_PREFETCH0x08, |
| 446 | &s->rom); |
| 447 | |
| 448 | XEN_PT_LOG(&s->dev, "Expansion ROM registered (size=0x%08"PRIx64 |
| 449 | " base_addr=0x%08"PRIx64")\n", |
| 450 | d->rom.size, d->rom.base_addr); |
| 451 | } |
| 452 | |
| 453 | return 0; |
| 454 | } |
| 455 | |
| 456 | static void xen_pt_unregister_regions(XenPCIPassthroughState *s) |
| 457 | { |
| 458 | XenHostPCIDevice *d = &s->real_device; |
| 459 | int i; |
| 460 | |
| 461 | for (i = 0; i < PCI_NUM_REGIONS7 - 1; i++) { |
| 462 | XenHostPCIIORegion *r = &d->io_regions[i]; |
| 463 | |
| 464 | if (r->base_addr == 0 || r->size == 0) { |
| 465 | continue; |
| 466 | } |
| 467 | |
| 468 | memory_region_destroy(&s->bar[i]); |
| 469 | } |
| 470 | if (d->rom.base_addr && d->rom.size) { |
| 471 | memory_region_destroy(&s->rom); |
| 472 | } |
| 473 | } |
| 474 | |
| 475 | /* region mapping */ |
| 476 | |
| 477 | static int xen_pt_bar_from_region(XenPCIPassthroughState *s, MemoryRegion *mr) |
| 478 | { |
| 479 | int i = 0; |
| 480 | |
| 481 | for (i = 0; i < PCI_NUM_REGIONS7 - 1; i++) { |
| 482 | if (mr == &s->bar[i]) { |
| 483 | return i; |
| 484 | } |
| 485 | } |
| 486 | if (mr == &s->rom) { |
| 487 | return PCI_ROM_SLOT6; |
| 488 | } |
| 489 | return -1; |
| 490 | } |
| 491 | |
| 492 | /* |
| 493 | * This function checks if an io_region overlaps an io_region from another |
| 494 | * device. The io_region to check is provided with (addr, size and type) |
| 495 | * A callback can be provided and will be called for every region that is |
| 496 | * overlapped. |
| 497 | * The return value indicates if the region is overlappsed */ |
| 498 | struct CheckBarArgs { |
| 499 | XenPCIPassthroughState *s; |
| 500 | pcibus_t addr; |
| 501 | pcibus_t size; |
| 502 | uint8_t type; |
| 503 | bool_Bool rc; |
| 504 | }; |
| 505 | static void xen_pt_check_bar_overlap(PCIBus *bus, PCIDevice *d, void *opaque) |
| 506 | { |
| 507 | struct CheckBarArgs *arg = opaque; |
| 508 | XenPCIPassthroughState *s = arg->s; |
| 509 | uint8_t type = arg->type; |
| 510 | int i; |
| 511 | |
| 512 | if (d->devfn == s->dev.devfn) { |
| 513 | return; |
| 514 | } |
| 515 | |
| 516 | /* xxx: This ignores bridges. */ |
| 517 | for (i = 0; i < PCI_NUM_REGIONS7; i++) { |
| 518 | const PCIIORegion *r = &d->io_regions[i]; |
| 519 | |
| 520 | if (!r->size) { |
| 521 | continue; |
| 522 | } |
| 523 | if ((type & PCI_BASE_ADDRESS_SPACE_IO0x01) |
| 524 | != (r->type & PCI_BASE_ADDRESS_SPACE_IO0x01)) { |
| 525 | continue; |
| 526 | } |
| 527 | |
| 528 | if (ranges_overlap(arg->addr, arg->size, r->addr, r->size)) { |
| 529 | XEN_PT_WARN(&s->dev, |
| 530 | "Overlapped to device [%02x:%02x.%d] Region: %i" |
| 531 | " (addr: %#"FMT_PCIBUS", len: %#"FMT_PCIBUS")\n", |
| 532 | pci_bus_num(bus), PCI_SLOT(d->devfn), |
| 533 | PCI_FUNC(d->devfn), i, r->addr, r->size); |
| 534 | arg->rc = true1; |
| 535 | } |
| 536 | } |
| 537 | } |
| 538 | |
| 539 | static void xen_pt_region_update(XenPCIPassthroughState *s, |
| 540 | MemoryRegionSection *sec, bool_Bool adding) |
| 541 | { |
| 542 | PCIDevice *d = &s->dev; |
| 543 | MemoryRegion *mr = sec->mr; |
| 544 | int bar = -1; |
| 545 | int rc; |
| 546 | int op = adding ? DPCI_ADD_MAPPING1 : DPCI_REMOVE_MAPPING0; |
| 547 | struct CheckBarArgs args = { |
| 548 | .s = s, |
| 549 | .addr = sec->offset_within_address_space, |
| 550 | .size = int128_get64(sec->size), |
| 551 | .rc = false0, |
| 552 | }; |
| 553 | |
| 554 | bar = xen_pt_bar_from_region(s, mr); |
| 555 | if (bar == -1 && (!s->msix || &s->msix->mmio != mr)) { |
| 556 | return; |
| 557 | } |
| 558 | |
| 559 | if (s->msix && &s->msix->mmio == mr) { |
| 560 | if (adding) { |
| 561 | s->msix->mmio_base_addr = sec->offset_within_address_space; |
| 562 | rc = xen_pt_msix_update_remap(s, s->msix->bar_index); |
Value stored to 'rc' is never read | |
| 563 | } |
| 564 | return; |
| 565 | } |
| 566 | |
| 567 | args.type = d->io_regions[bar].type; |
| 568 | pci_for_each_device(d->bus, pci_bus_num(d->bus), |
| 569 | xen_pt_check_bar_overlap, &args); |
| 570 | if (args.rc) { |
| 571 | XEN_PT_WARN(d, "Region: %d (addr: %#"FMT_PCIBUS |
| 572 | ", len: %#"FMT_PCIBUS") is overlapped.\n", |
| 573 | bar, sec->offset_within_address_space, |
| 574 | int128_get64(sec->size)); |
| 575 | } |
| 576 | |
| 577 | if (d->io_regions[bar].type & PCI_BASE_ADDRESS_SPACE_IO0x01) { |
| 578 | uint32_t guest_port = sec->offset_within_address_space; |
| 579 | uint32_t machine_port = s->bases[bar].access.pio_base; |
| 580 | uint32_t size = int128_get64(sec->size); |
| 581 | rc = xc_domain_ioport_mapping(xen_xc, xen_domid, |
| 582 | guest_port, machine_port, size, |
| 583 | op); |
| 584 | if (rc) { |
| 585 | XEN_PT_ERR(d, "%s ioport mapping failed! (rc: %i)\n",xen_pt_log(d, "%s: Error: ""%s ioport mapping failed! (rc: %i)\n" , __func__, adding ? "create new" : "remove old", rc) |
| 586 | adding ? "create new" : "remove old", rc)xen_pt_log(d, "%s: Error: ""%s ioport mapping failed! (rc: %i)\n" , __func__, adding ? "create new" : "remove old", rc); |
| 587 | } |
| 588 | } else { |
| 589 | pcibus_t guest_addr = sec->offset_within_address_space; |
| 590 | pcibus_t machine_addr = s->bases[bar].access.maddr |
| 591 | + sec->offset_within_region; |
| 592 | pcibus_t size = int128_get64(sec->size); |
| 593 | rc = xc_domain_memory_mapping(xen_xc, xen_domid, |
| 594 | XEN_PFN(guest_addr + XC_PAGE_SIZE - 1)((guest_addr + (1UL << 12) - 1) >> 12), |
| 595 | XEN_PFN(machine_addr + XC_PAGE_SIZE - 1)((machine_addr + (1UL << 12) - 1) >> 12), |
| 596 | XEN_PFN(size + XC_PAGE_SIZE - 1)((size + (1UL << 12) - 1) >> 12), |
| 597 | op); |
| 598 | if (rc) { |
| 599 | XEN_PT_ERR(d, "%s mem mapping failed! (rc: %i)\n",xen_pt_log(d, "%s: Error: ""%s mem mapping failed! (rc: %i)\n" , __func__, adding ? "create new" : "remove old", rc) |
| 600 | adding ? "create new" : "remove old", rc)xen_pt_log(d, "%s: Error: ""%s mem mapping failed! (rc: %i)\n" , __func__, adding ? "create new" : "remove old", rc); |
| 601 | } |
| 602 | } |
| 603 | } |
| 604 | |
| 605 | static void xen_pt_region_add(MemoryListener *l, MemoryRegionSection *sec) |
| 606 | { |
| 607 | XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState,({ const typeof(((XenPCIPassthroughState *) 0)->memory_listener ) *__mptr = (l); (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof(XenPCIPassthroughState, memory_listener)) ;}) |
| 608 | memory_listener)({ const typeof(((XenPCIPassthroughState *) 0)->memory_listener ) *__mptr = (l); (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof(XenPCIPassthroughState, memory_listener)) ;}); |
| 609 | |
| 610 | memory_region_ref(sec->mr); |
| 611 | xen_pt_region_update(s, sec, true1); |
| 612 | } |
| 613 | |
| 614 | static void xen_pt_region_del(MemoryListener *l, MemoryRegionSection *sec) |
| 615 | { |
| 616 | XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState,({ const typeof(((XenPCIPassthroughState *) 0)->memory_listener ) *__mptr = (l); (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof(XenPCIPassthroughState, memory_listener)) ;}) |
| 617 | memory_listener)({ const typeof(((XenPCIPassthroughState *) 0)->memory_listener ) *__mptr = (l); (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof(XenPCIPassthroughState, memory_listener)) ;}); |
| 618 | |
| 619 | xen_pt_region_update(s, sec, false0); |
| 620 | memory_region_unref(sec->mr); |
| 621 | } |
| 622 | |
| 623 | static void xen_pt_io_region_add(MemoryListener *l, MemoryRegionSection *sec) |
| 624 | { |
| 625 | XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState,({ const typeof(((XenPCIPassthroughState *) 0)->io_listener ) *__mptr = (l); (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof(XenPCIPassthroughState, io_listener));}) |
| 626 | io_listener)({ const typeof(((XenPCIPassthroughState *) 0)->io_listener ) *__mptr = (l); (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof(XenPCIPassthroughState, io_listener));}); |
| 627 | |
| 628 | memory_region_ref(sec->mr); |
| 629 | xen_pt_region_update(s, sec, true1); |
| 630 | } |
| 631 | |
| 632 | static void xen_pt_io_region_del(MemoryListener *l, MemoryRegionSection *sec) |
| 633 | { |
| 634 | XenPCIPassthroughState *s = container_of(l, XenPCIPassthroughState,({ const typeof(((XenPCIPassthroughState *) 0)->io_listener ) *__mptr = (l); (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof(XenPCIPassthroughState, io_listener));}) |
| 635 | io_listener)({ const typeof(((XenPCIPassthroughState *) 0)->io_listener ) *__mptr = (l); (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof(XenPCIPassthroughState, io_listener));}); |
| 636 | |
| 637 | xen_pt_region_update(s, sec, false0); |
| 638 | memory_region_unref(sec->mr); |
| 639 | } |
| 640 | |
| 641 | static const MemoryListener xen_pt_memory_listener = { |
| 642 | .region_add = xen_pt_region_add, |
| 643 | .region_del = xen_pt_region_del, |
| 644 | .priority = 10, |
| 645 | }; |
| 646 | |
| 647 | static const MemoryListener xen_pt_io_listener = { |
| 648 | .region_add = xen_pt_io_region_add, |
| 649 | .region_del = xen_pt_io_region_del, |
| 650 | .priority = 10, |
| 651 | }; |
| 652 | |
| 653 | /* init */ |
| 654 | |
| 655 | static int xen_pt_initfn(PCIDevice *d) |
| 656 | { |
| 657 | XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d)( __extension__ ( { char __attribute__((unused)) offset_must_be_zero [ -__builtin_offsetof(XenPCIPassthroughState, dev)]; ({ const typeof(((XenPCIPassthroughState *) 0)->dev) *__mptr = (d) ; (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof (XenPCIPassthroughState, dev));});})); |
| 658 | int rc = 0; |
| 659 | uint8_t machine_irq = 0; |
| 660 | int pirq = XEN_PT_UNASSIGNED_PIRQ(-1); |
| 661 | |
| 662 | /* register real device */ |
| 663 | XEN_PT_LOG(d, "Assigning real physical device %02x:%02x.%d" |
| 664 | " to devfn %#x\n", |
| 665 | s->hostaddr.bus, s->hostaddr.slot, s->hostaddr.function, |
| 666 | s->dev.devfn); |
| 667 | |
| 668 | rc = xen_host_pci_device_get(&s->real_device, |
| 669 | s->hostaddr.domain, s->hostaddr.bus, |
| 670 | s->hostaddr.slot, s->hostaddr.function); |
| 671 | if (rc) { |
| 672 | XEN_PT_ERR(d, "Failed to \"open\" the real pci device. rc: %i\n", rc)xen_pt_log(d, "%s: Error: ""Failed to \"open\" the real pci device. rc: %i\n" , __func__, rc); |
| 673 | return -1; |
| 674 | } |
| 675 | |
| 676 | s->is_virtfn = s->real_device.is_virtfn; |
| 677 | if (s->is_virtfn) { |
| 678 | XEN_PT_LOG(d, "%04x:%02x:%02x.%d is a SR-IOV Virtual Function\n", |
| 679 | s->real_device.domain, s->real_device.bus, |
| 680 | s->real_device.dev, s->real_device.func); |
| 681 | } |
| 682 | |
| 683 | /* Initialize virtualized PCI configuration (Extended 256 Bytes) */ |
| 684 | if (xen_host_pci_get_block(&s->real_device, 0, d->config, |
| 685 | PCI_CONFIG_SPACE_SIZE0x100) == -1) { |
| 686 | xen_host_pci_device_put(&s->real_device); |
| 687 | return -1; |
| 688 | } |
| 689 | |
| 690 | s->memory_listener = xen_pt_memory_listener; |
| 691 | s->io_listener = xen_pt_io_listener; |
| 692 | |
| 693 | /* Handle real device's MMIO/PIO BARs */ |
| 694 | xen_pt_register_regions(s); |
| 695 | |
| 696 | /* reinitialize each config register to be emulated */ |
| 697 | if (xen_pt_config_init(s)) { |
| 698 | XEN_PT_ERR(d, "PCI Config space initialisation failed.\n")xen_pt_log(d, "%s: Error: ""PCI Config space initialisation failed.\n" , __func__); |
| 699 | xen_host_pci_device_put(&s->real_device); |
| 700 | return -1; |
| 701 | } |
| 702 | |
| 703 | /* Bind interrupt */ |
| 704 | if (!s->dev.config[PCI_INTERRUPT_PIN0x3d]) { |
| 705 | XEN_PT_LOG(d, "no pin interrupt\n"); |
| 706 | goto out; |
| 707 | } |
| 708 | |
| 709 | machine_irq = s->real_device.irq; |
| 710 | rc = xc_physdev_map_pirq(xen_xc, xen_domid, machine_irq, &pirq); |
| 711 | |
| 712 | if (rc < 0) { |
| 713 | XEN_PT_ERR(d, "Mapping machine irq %u to pirq %i failed, (rc: %d)\n",xen_pt_log(d, "%s: Error: ""Mapping machine irq %u to pirq %i failed, (rc: %d)\n" , __func__, machine_irq, pirq, rc) |
| 714 | machine_irq, pirq, rc)xen_pt_log(d, "%s: Error: ""Mapping machine irq %u to pirq %i failed, (rc: %d)\n" , __func__, machine_irq, pirq, rc); |
| 715 | |
| 716 | /* Disable PCI intx assertion (turn on bit10 of devctl) */ |
| 717 | xen_host_pci_set_word(&s->real_device, |
| 718 | PCI_COMMAND0x04, |
| 719 | pci_get_word(s->dev.config + PCI_COMMAND0x04) |
| 720 | | PCI_COMMAND_INTX_DISABLE0x400); |
| 721 | machine_irq = 0; |
| 722 | s->machine_irq = 0; |
| 723 | } else { |
| 724 | machine_irq = pirq; |
| 725 | s->machine_irq = pirq; |
| 726 | xen_pt_mapped_machine_irq[machine_irq]++; |
| 727 | } |
| 728 | |
| 729 | /* bind machine_irq to device */ |
| 730 | if (machine_irq != 0) { |
| 731 | uint8_t e_intx = xen_pt_pci_intx(s); |
| 732 | |
| 733 | rc = xc_domain_bind_pt_pci_irq(xen_xc, xen_domid, machine_irq, |
| 734 | pci_bus_num(d->bus), |
| 735 | PCI_SLOT(d->devfn)(((d->devfn) >> 3) & 0x1f), |
| 736 | e_intx); |
| 737 | if (rc < 0) { |
| 738 | XEN_PT_ERR(d, "Binding of interrupt %i failed! (rc: %d)\n",xen_pt_log(d, "%s: Error: ""Binding of interrupt %i failed! (rc: %d)\n" , __func__, e_intx, rc) |
| 739 | e_intx, rc)xen_pt_log(d, "%s: Error: ""Binding of interrupt %i failed! (rc: %d)\n" , __func__, e_intx, rc); |
| 740 | |
| 741 | /* Disable PCI intx assertion (turn on bit10 of devctl) */ |
| 742 | xen_host_pci_set_word(&s->real_device, PCI_COMMAND0x04, |
| 743 | *(uint16_t *)(&s->dev.config[PCI_COMMAND0x04]) |
| 744 | | PCI_COMMAND_INTX_DISABLE0x400); |
| 745 | xen_pt_mapped_machine_irq[machine_irq]--; |
| 746 | |
| 747 | if (xen_pt_mapped_machine_irq[machine_irq] == 0) { |
| 748 | if (xc_physdev_unmap_pirq(xen_xc, xen_domid, machine_irq)) { |
| 749 | XEN_PT_ERR(d, "Unmapping of machine interrupt %i failed!"xen_pt_log(d, "%s: Error: ""Unmapping of machine interrupt %i failed!" " (rc: %d)\n", __func__, machine_irq, rc) |
| 750 | " (rc: %d)\n", machine_irq, rc)xen_pt_log(d, "%s: Error: ""Unmapping of machine interrupt %i failed!" " (rc: %d)\n", __func__, machine_irq, rc); |
| 751 | } |
| 752 | } |
| 753 | s->machine_irq = 0; |
| 754 | } |
| 755 | } |
| 756 | |
| 757 | out: |
| 758 | memory_listener_register(&s->memory_listener, &address_space_memory); |
| 759 | memory_listener_register(&s->io_listener, &address_space_io); |
| 760 | XEN_PT_LOG(d, |
| 761 | "Real physical device %02x:%02x.%d registered successfully!\n", |
| 762 | s->hostaddr.bus, s->hostaddr.slot, s->hostaddr.function); |
| 763 | |
| 764 | return 0; |
| 765 | } |
| 766 | |
| 767 | static void xen_pt_unregister_device(PCIDevice *d) |
| 768 | { |
| 769 | XenPCIPassthroughState *s = DO_UPCAST(XenPCIPassthroughState, dev, d)( __extension__ ( { char __attribute__((unused)) offset_must_be_zero [ -__builtin_offsetof(XenPCIPassthroughState, dev)]; ({ const typeof(((XenPCIPassthroughState *) 0)->dev) *__mptr = (d) ; (XenPCIPassthroughState *) ((char *) __mptr - __builtin_offsetof (XenPCIPassthroughState, dev));});})); |
| 770 | uint8_t machine_irq = s->machine_irq; |
| 771 | uint8_t intx = xen_pt_pci_intx(s); |
| 772 | int rc; |
| 773 | |
| 774 | if (machine_irq) { |
| 775 | rc = xc_domain_unbind_pt_irq(xen_xc, xen_domid, machine_irq, |
| 776 | PT_IRQ_TYPE_PCI, |
| 777 | pci_bus_num(d->bus), |
| 778 | PCI_SLOT(s->dev.devfn)(((s->dev.devfn) >> 3) & 0x1f), |
| 779 | intx, |
| 780 | 0 /* isa_irq */); |
| 781 | if (rc < 0) { |
| 782 | XEN_PT_ERR(d, "unbinding of interrupt INT%c failed."xen_pt_log(d, "%s: Error: ""unbinding of interrupt INT%c failed." " (machine irq: %i, rc: %d)" " But bravely continuing on..\n" , __func__, 'a' + intx, machine_irq, rc) |
| 783 | " (machine irq: %i, rc: %d)"xen_pt_log(d, "%s: Error: ""unbinding of interrupt INT%c failed." " (machine irq: %i, rc: %d)" " But bravely continuing on..\n" , __func__, 'a' + intx, machine_irq, rc) |
| 784 | " But bravely continuing on..\n",xen_pt_log(d, "%s: Error: ""unbinding of interrupt INT%c failed." " (machine irq: %i, rc: %d)" " But bravely continuing on..\n" , __func__, 'a' + intx, machine_irq, rc) |
| 785 | 'a' + intx, machine_irq, rc)xen_pt_log(d, "%s: Error: ""unbinding of interrupt INT%c failed." " (machine irq: %i, rc: %d)" " But bravely continuing on..\n" , __func__, 'a' + intx, machine_irq, rc); |
| 786 | } |
| 787 | } |
| 788 | |
| 789 | if (s->msi) { |
| 790 | xen_pt_msi_disable(s); |
| 791 | } |
| 792 | if (s->msix) { |
| 793 | xen_pt_msix_disable(s); |
| 794 | } |
| 795 | |
| 796 | if (machine_irq) { |
| 797 | xen_pt_mapped_machine_irq[machine_irq]--; |
| 798 | |
| 799 | if (xen_pt_mapped_machine_irq[machine_irq] == 0) { |
| 800 | rc = xc_physdev_unmap_pirq(xen_xc, xen_domid, machine_irq); |
| 801 | |
| 802 | if (rc < 0) { |
| 803 | XEN_PT_ERR(d, "unmapping of interrupt %i failed. (rc: %d)"xen_pt_log(d, "%s: Error: ""unmapping of interrupt %i failed. (rc: %d)" " But bravely continuing on..\n", __func__, machine_irq, rc) |
| 804 | " But bravely continuing on..\n",xen_pt_log(d, "%s: Error: ""unmapping of interrupt %i failed. (rc: %d)" " But bravely continuing on..\n", __func__, machine_irq, rc) |
| 805 | machine_irq, rc)xen_pt_log(d, "%s: Error: ""unmapping of interrupt %i failed. (rc: %d)" " But bravely continuing on..\n", __func__, machine_irq, rc); |
| 806 | } |
| 807 | } |
| 808 | } |
| 809 | |
| 810 | /* delete all emulated config registers */ |
| 811 | xen_pt_config_delete(s); |
| 812 | |
| 813 | xen_pt_unregister_regions(s); |
| 814 | memory_listener_unregister(&s->memory_listener); |
| 815 | memory_listener_unregister(&s->io_listener); |
| 816 | |
| 817 | xen_host_pci_device_put(&s->real_device); |
| 818 | } |
| 819 | |
| 820 | static Property xen_pci_passthrough_properties[] = { |
| 821 | DEFINE_PROP_PCI_HOST_DEVADDR("hostaddr", XenPCIPassthroughState, hostaddr){ .name = ("hostaddr"), .info = &(qdev_prop_pci_host_devaddr ), .offset = __builtin_offsetof(XenPCIPassthroughState, hostaddr ) + ((PCIHostDeviceAddress*)0 - (typeof(((XenPCIPassthroughState *)0)->hostaddr)*)0), }, |
| 822 | DEFINE_PROP_END_OF_LIST(){}, |
| 823 | }; |
| 824 | |
| 825 | static void xen_pci_passthrough_class_init(ObjectClass *klass, void *data) |
| 826 | { |
| 827 | DeviceClass *dc = DEVICE_CLASS(klass)((DeviceClass *)object_class_dynamic_cast_assert(((ObjectClass *)((klass))), ("device"), "/home/stefan/src/qemu/qemu.org/qemu/hw/xen/xen_pt.c" , 827, __func__)); |
| 828 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass)((PCIDeviceClass *)object_class_dynamic_cast_assert(((ObjectClass *)((klass))), ("pci-device"), "/home/stefan/src/qemu/qemu.org/qemu/hw/xen/xen_pt.c" , 828, __func__)); |
| 829 | |
| 830 | k->init = xen_pt_initfn; |
| 831 | k->exit = xen_pt_unregister_device; |
| 832 | k->config_read = xen_pt_pci_read_config; |
| 833 | k->config_write = xen_pt_pci_write_config; |
| 834 | set_bit(DEVICE_CATEGORY_MISC, dc->categories); |
| 835 | dc->desc = "Assign an host PCI device with Xen"; |
| 836 | dc->props = xen_pci_passthrough_properties; |
| 837 | }; |
| 838 | |
| 839 | static const TypeInfo xen_pci_passthrough_info = { |
| 840 | .name = "xen-pci-passthrough", |
| 841 | .parent = TYPE_PCI_DEVICE"pci-device", |
| 842 | .instance_size = sizeof(XenPCIPassthroughState), |
| 843 | .class_init = xen_pci_passthrough_class_init, |
| 844 | }; |
| 845 | |
| 846 | static void xen_pci_passthrough_register_types(void) |
| 847 | { |
| 848 | type_register_static(&xen_pci_passthrough_info); |
| 849 | } |
| 850 | |
| 851 | type_init(xen_pci_passthrough_register_types)static void __attribute__((constructor)) do_qemu_init_xen_pci_passthrough_register_types (void) { register_module_init(xen_pci_passthrough_register_types , MODULE_INIT_QOM); } |